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For Video Equipment
MN3111H
Vertical Driver LSI for Video Camera CCD Area Image Sensor
Overview
The MN3111H is a vertical driver LSI for a two-dimensional interline CCD image sensor. It features a built-in power supply circuit that, in conjunction with such external components as four booster capacitors, six voltage stabilization capacitors, eight Schottky barrier diodes, and two Zener diodes, produces stabilized +15.0V and -10.0V power supplies from a +5.0V input and HD pulses.
Pin Assignment
VEE VHH OSUB VL2 VL1 OV1 VM13 OV3 OV2 VM24 OV4 VH 36 35 34 33 32 31 30 29 28 27 26 25
Features
Single 5 volt power supply
Applications
Video cameras
OVEE C3+ GND C2- C3 - C2+ C1+ C1- VCC1 C4+ OVDD HD
1 2 3 4 5 6 7 8 9 10 11 12
ISUB CH1 IV1 IV3 CH2 SENSE2 VOUT- VIN - GND N.C. N.C. C4 -
37 38 39 40 41 42 43 44 45 46 47 48
24 23 22 21 20 19 18 17 16 15 14 13
VDD VCC2 IV2 IV4 SENSE1 VOUT+ N.C. VIN+ CAP3 CAP2 CAP1 TEST
(TOP VIEW) QFH048-P-0707
MN3111H
Block Diagram
For Video Equipment
OSUB
VM13
VM24
OV1
OV3
OV2
VL1
OV4 26
VHH
35
34
32
31
30
29
28
27
VL2 VEE ISUB IV1 CH1 IV3 CH2
33 36 37 39 38 40 41 22 21 Tristate driver Tristate driver
25
VH 24 23
VDD VCC2
IV2 IV4
SENSE2 VOUT- VIN - GND
42 43 44 45 Negative voltage monitor Positive voltage monitor
20 19
SENSE1 VOUT+
17 16 15 14 12 Negative and positive boosting voltage generator 13
VIN+ CAP3 CAP2 CAP1 HD TEST
48
OVEE
10
8
7
4
6
5
2
OVDD
C1-
C1+
C2-
C2+
C3 -
C3+
C4 -
C4+
GND
VCC1
11
1
3
9
For Video Equipment
Pin Descriptions
Pin No. 9 23 3 45 25 35 30 27 32 33 24 36 17 44 13 12 22 21 39 40 38 41 37 20 42 7 8 6 4 2 5 10 48 VH VHH VM13 VM24 VL1 VL2 VDD VEE VIN+ VIN - TEST HD IV2 IV4 IV1 IV3 CH1 CH2 ISUB SENSE1 SENSE2 C1+ C1- C2+ C2- C3+ C3 - C4+ C4 - C4 connection O C3 connection O C2 connection O Symbol VCC1 VCC2 GND Pin Name "H" level power supply for input block "L" level power supply for input block "H" level power supply for vertical driver "H" level power supply for SUB driver "M" level power supply for vertical driver "L" level power supply for vertical driver "L" level power supply for SUB driver Driver power supply 1 Driver power supply 2 Voltage input for positive voltage monitor Voltage input for negative voltage monitor Test input HD pulse input Transfer pulse input Transfer pulse input Transfer pulse input Transfer pulse input Charge pulse input Charge pulse input SUB pulse input Positive voltage monitor sensing input Negative voltage monitor sensing input C1 connection O I I I I I I I I I I I I I I I I I I I I I I/O I
MN3111H
Function Description "H" level input for 5 volt circuits "L" level input for 5 volt circuits "H" level input for high-voltage circuits "H" level input for high-voltage circuits "M" level input for high-voltage circuits "L" level input for high-voltage circuits "L" level input for high-voltage circuits "H" level for high-voltage circuits "L" level for high-voltage circuits Voltage input pin for positive voltage monitor Voltage input pin for negative voltage monitor Test pin (Keep this pin at "H" level.) HD pulse input pin Charge transfer pulse input pin Charge transfer pulse input pin Charge transfer pulse input pin Charge transfer pulse input pin Charge readout pulse input pin Charge readout pulse input pin Unwanted charge rejection pulse input pin Positive voltage monitor control sensing pin (Leave this pin open.) Negative voltage monitor control sensing pin (Leave this pin open.) Booster block voltage charging capacitor connection pins Booster block voltage charging capacitor connection pins Booster block voltage charging capacitor connection pins Booster block voltage charging capacitor connection pins
MN3111H
Pin Descriptions (continued)
Pin No. 11 1 19 43 26 28 29 31 34 14 15 16 18 46 47 Symbol OVDD OVEE VOUT+ VOUTOV4 OV2 OV3 OV1 OSUB CAP1 CAP2 CAP3 N.C. No connection -- Pin Name Booster block positive voltage output Booster block negative voltage output Positive regulated voltage output Negative regulated voltage output Binary transfer pulse output Binary transfer pulse output Tristate transfer pulse output Tristate transfer pulse output SUB pulse output Stabilizing capacitor connection O O O O O O O O O I/O O
For Video Equipment
Function Description Booster block positive voltage output pin Booster block negative voltage output pin Positive voltage monitor output pin (Leave this pin open.) Negative voltage monitor output pin (Leave this pin open.) Binary (VM24 , V L1) transfer pulse output pin Binary (VM24 , VL1 ) transfer pulse output pin Tristate (VH , V M13 , V L1) transfer pulse output pin Tristate (VH , V M13 , V L1) transfer pulse output pin Unwanted charge (VHH , VL2 ) rejection pulse input pin Pins for connecting capacitors for internal voltage stabilization circuits
For Video Equipment
Functional Description Binary transfer pulses (vertical driver block)
IV2 IV4 H L OV2 OV4 L M
MN3111H
Tristate transfer pulses (vertical driver block)
CH1 CH2 H L
*1 IV1, IV2, IV3, IV4, CH1, CH2 H: VCC L: GND OV1, OV2, OV3, OV4 H: VH M: VM13 , or VM24 L: VL1
IV1 IV3 H L H L
OV1 OV3 L M L H
Unwanted charge rejection pulses (SUB driver block)
ISUB H L
*1 ISUB H: VCC L: GND OSUB H: VHH L: VL2
OSUB L H
MN3111H
Electrical Characteristics (1) DC characteristics
VHH=VH=15.0V, V M13=VM24 =1.0V, GND=0.0V, VCC1=VCC2=5.0V (=VCC ), VL1=-7.0V, VL2=-10.0V, Ta=+25C
For Video Equipment
Parameter Quiescent supply current Operating supply current Power supply output pins Positive voltage stabilization circuit output voltage Negative voltage stabilization circuit output voltage Input pins "H" level voltage "L" level voltage Input leak current Output pins 1 (Binary output) Output voltage "M" level Output voltage "L" level Output on resistance "M" level Output on resistance "L" level
Symbol IDDST IDDDYN VREG+ VREG-
Test conditions VI=GND, V CC VI=GND, V CC VI=GND, V CC , IO=7mA VI=GND, V CC , IO=-2mA
min
typ
max 4 11
Unit mA mA V V
OVDD , OVEE 14.5 -10.5 15.0 -10.0 15.5 -9.5
IV1, IV2, IV3, IV4, CH1, CH2, ISUB, HD VIH VIL ILI VOM1 VOL1 RONM1 RONL1 VOH2 VOM2 VOL2 RONH2 RONM2 RONL2 V OHH3 VOL3 RONHH3 RONL3 VI=0 to 5V OV2, OV4 VI=GND, V CC , IOM1=-1mA VI=GND, V CC , IOL1 =1mA IOM1=-50mA IOL1 =50mA VI=GND, V CC , IOH2= -1mA VI=GND, V CC , IOM2=-1mA VI=GND, V CC , IOL2 =1mA IOH2=-50mA IOM2=50mA IOL2 =50mA VI=GND, V CC , IOHH3=-1mA VI=GND, V CC , IOL3 =1mA IONHH3=-50mA IONL3=50mA 14.9 VL2 14.9 0.9 VL1 0.9 VL1 VM24 -6.9 40 40 VH VM13 -6.9 50 40 40 VHH -9.9 50 40 V V V V V V V 3.5 GND VCC 1.5 1 V V A
Output pins 2 (Tristate output) Output voltage "H" level Output voltage "M" level Output voltage "L" level Output on resistance "H" level Output on resistance "M" level Output on resistance "L" level Output pin 3 (SUB output) Output voltage "H" level Output voltage "L" level Output on resistance "H" level Output on resistance "L" level
OV1, OV3
OSUB
For Video Equipment
(2) AC characteristics
VHH=VH=15.0V, V M13=VM24 =1.0V, GND=0.0V, VCC1=VCC2=5.0V (=VCC), V L1=-7.0V, VL2=-10.0V, Ta=+25C
MN3111H
Parameter Symbol Output pins 1 (Binary output) OV2, OV4 Transmission delay Rise time Fall time Output pins 2 (Tristate output) Transmission delay Transmission delay Rise time Fall time Rise time Fall time Output pin 3 (SUB output) Transmission delay Rise time Fall time tPLM tPML tTLM tTML OV1, OV3 tPLM tPML tPMH tPHM tTLM tTML tTMH tTHM OSUB tPLHH tPHHL tTLHH tTHHL No load No load No load
Test conditions
min
typ
max
Unit
From "L" level to "M" level
100 200
200 300
ns ns
From "L" level to "M" level No load From "M" level to "H" level
100 200 200 200
200 400 300 300
ns ns ns ns
From "L" level to "H" level
100 200
200 300
ns ns
MN3111H
Timing Chart 1. Binary transfer pulses
63.5s 2s IV2 254s
For Video Equipment
63.5s H L M L
OV2
2. Binary transfer pulses
IV4 H L M L
OV4
3. Tristate transfer pulses
IV1 3s CH1 H L H L H OV1 M L
4. Tristate transfer pulses
IV3 CH2 H L H L H M L
OV3
5. SUB pulses
ISUB H L H OSUB L
For Video Equipment
Application Circuit Example
Diode with VF=0.7V Zener diode D13 < -7.9V > to CCD's PT pin D14 C18 to CCD's oV pin
MN3111H
to CCD's source follower power supply for OD, RD, and IS pins D15
*1
Schottky barrier diode
R6
D11
D12
*1
+
C17
+
< -7V >
C19
< -10.0V >
C20
R4 + + + D9 D7 5 volt input C9 C10 C11 C12 from clock generator R3 C14 C15
+
36
35
34
R7
33
32
31
30
29
28
27
26
VEE
OSUB
VHH
VL2
VL1
OV1
VM13
OV3
OV2
VM24
OV4
from clock generator
VH
25
37 38 39 40 41 C13 + 42 43 44 45 46 47 48 D10
ISUB CH1 IV1 IV3 CH2 SENSE2 VOUT- VIN - GND NC NC C4 - 11 OVDD OVEE GND VCC1 C3 - C3+ C2+ C1+ 10 C4+ C2- C1-
VDD VCC2 IV2 IV4 SENSE1
24 23 22 21 20 19 18 17 16 15 14 13 R1
MN3111H
VOUT+ NC VIN+ CAP3 CAP2 CAP1 TEST
C4
+ R2
C2
D1
C7
D8
C3
+
+
C1
D3
D5
C5
D2
+
+
+
+ C6
The booster circuit's electrolytic capacitors must have little impedance fluctuation at low temperatures. Note *1: These diodes must have a V F of 0.7 V. All other diodes, except the Zener diodes, must be Schottky barrier diodes (MA723).
D4
D6
C8
12 HD
1
2
3
4
5
6
7
8
9
< +15.0V >
R5
C16
MN3111H
Package Dimensions (Unit: mm)
QFH048-P-0707
For Video Equipment
9.00.2 7.00.2 36 25
(0.75) 7.00.2
37
24
48
13
1 (0.75) 0.5
12 0.20.1 (1.0)
2.9 max.
2.50.2
9.00.2
0.15
+0.10 -0.05
0.10.1
0.1 SEATING PLANE
0.50.2
0 to 10
For Video Equipment
Usage Notes External components
1. This product requires eight Schottky barrier diodes and two Zener diodes. We recommend the following components. Schottky barrier diodes: Zener diodes: MA723 or equivalents
MN3111H
MA1150-M, MA8150-M (for positive regulated voltage) or equivalents MA1100-M, MA8100-M (for negative regulated voltage) or equivalents
Ta=25C
Component Schottky barrier diodes
Model number MA723 MA1150-M
Typical characteristics I F =200mA, VF 0.55V I Z=5mA, 14.6V VZ 15.35V I Z=5mA, 9.75V VZ 10.25V
Notes
for positive regulated voltage for negative regulated voltage
Zener diodes
MA8150-M MA1100-M MA8100-M
The MN3111H will not operate properly if the components do not satisfy the above specifications.
2. Always use the specified components for peripheral circuits so as to ensure that OVEE and VL do not reverse potentials when the power is turned off.
Normal operation
GND VL1/VL2 OVEE OFF GND
Faulty operation
0.7V or higher VL1/VL2 OVEE Reversal OFF
As the above sketch illustrates, allowing OVEE to exceed V L1 and VL2 by more than 0.7 V produces the risk of applying a forward bias to the PN junction, turning on the parasitic transistor, and generating an overcurrent that produces latch-up. If this phenomenon arises, increase the size of capacitor C7 or decrease the size of capacitor C13 to increase the OVEE time constant. (See the sample application circuit for the locations of C7 and C13.)
Request for your special attention and precautions in using the technical information and semiconductors described in this material
(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuit examples of the products. It does not constitute the warranting of industrial property, the granting of relative rights, or the granting of any license. (3) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: * Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. * Any applications other than the standard applications intended. (4) The products and product specifications described in this material are subject to change without notice for reasons of modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, redundant design is recommended, so that such equipment may not violate relevant laws or regulations because of the function of our products. (6) When using products for which dry packing is required, observe the conditions (including shelf life and after-unpacking standby time) agreed upon when specification sheets are individually exchanged. (7) No part of this material may be reprinted or reproduced by any means without written permission from our company.
Please read the following notes before using the datasheets
A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and obtain the latest information before starting precise technical research and/or purchasing activities. B. Panasonic is endeavoring to continually improve the quality and reliability of these materials but there is always the possibility that further rectifications will be required in the future. Therefore, Panasonic will not assume any liability for any damages arising from any errors etc. that may appear in this material. C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited.
2001 MAR

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